{"id":802,"date":"2018-10-24T16:07:30","date_gmt":"2018-10-24T15:07:30","guid":{"rendered":"http:\/\/www.fabienm.eu\/flf\/?p=802"},"modified":"2018-10-24T16:07:30","modified_gmt":"2018-10-24T15:07:30","slug":"sortie-de-yosys-open-synthesis-suite-0-8","status":"publish","type":"post","link":"http:\/\/www.fabienm.eu\/flf\/sortie-de-yosys-open-synthesis-suite-0-8\/","title":{"rendered":"Sortie de Yosys Open Synthesis Suite 0.8"},"content":{"rendered":"<p>L&rsquo;annonce a \u00e9t\u00e9 faite mardi 16 octobre par W. Clifford : La version 0.8 de Yosis, un logiciel libre de synth\u00e8se Verilog est sortie.<\/p>\n<p>Dans le process de d\u00e9veloppement FPGA\/ASIC la synth\u00e8se est l&rsquo;\u00e9tape de conversion du mod\u00e8le mat\u00e9riel simul\u00e9 en \u00ab\u00a0netlist RTL\u00a0\u00bb d&rsquo;o\u00f9 l&rsquo;on peut d\u00e9river le circuit r\u00e9el.<\/p>\n<ul class=\"links\">\n<li id=\"link_102882\" class=\"link\" lang=\"en\" data-url=\"\/redaction\/links\/102882\/modifier\"><a class=\"hit_counter\" title=\"http:\/\/www.clifford.at\/yosys\/\" href=\"https:\/\/linuxfr.org\/redirect\/102882\" hreflang=\"en\" data-hit=\"102882\">Site officiel de Yosys<\/a> (77 clics)<\/li>\n<li id=\"link_102894\" class=\"link\" lang=\"en\" data-url=\"\/redaction\/links\/102894\/modifier\"><a class=\"hit_counter\" title=\"https:\/\/github.com\/YosysHQ\/yosys\/releases\/tag\/yosys-0.8\" href=\"https:\/\/linuxfr.org\/redirect\/102894\" hreflang=\"en\" data-hit=\"102894\">Page de t\u00e9l\u00e9chargement de la version 0.8<\/a> (12 clics)<\/li>\n<li id=\"link_102895\" class=\"link\" lang=\"en\" data-url=\"\/redaction\/links\/102895\/modifier\"><a class=\"hit_counter\" title=\"https:\/\/github.com\/YosysHQ\/yosys\/releases\" href=\"https:\/\/linuxfr.org\/redirect\/102895\" hreflang=\"en\" data-hit=\"102895\">La liste des changement dans le fichier CHANGELOG du projet<\/a> (14 clics)<\/li>\n<\/ul>\n<p><a href=\"https:\/\/linuxfr.org\/news\/sortie-de-yosys-open-synthesis-suite-0-8\">[La suite sur Linuxfr &#8230;\u00a0 ]<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>L&rsquo;annonce a \u00e9t\u00e9 faite mardi 16 octobre par W. Clifford : La version 0.8 de Yosis, un logiciel libre de synth\u00e8se Verilog est sortie. Dans le process de d\u00e9veloppement FPGA\/ASIC la synth\u00e8se est l&rsquo;\u00e9tape de conversion du mod\u00e8le mat\u00e9riel simul\u00e9 en \u00ab\u00a0netlist RTL\u00a0\u00bb d&rsquo;o\u00f9 l&rsquo;on peut d\u00e9river le circuit r\u00e9el. Site officiel de Yosys (77 &hellip; <a href=\"http:\/\/www.fabienm.eu\/flf\/sortie-de-yosys-open-synthesis-suite-0-8\/\" class=\"more-link\">Continuer la lecture de <span class=\"screen-reader-text\">Sortie de Yosys Open Synthesis Suite 0.8<\/span> <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_uag_custom_page_level_css":"","footnotes":""},"categories":[1],"tags":[],"class_list":["post-802","post","type-post","status-publish","format-standard","hentry","category-non-classe"],"uagb_featured_image_src":{"full":false,"thumbnail":false,"medium":false,"medium_large":false,"large":false,"1536x1536":false,"2048x2048":false,"post-thumbnail":false},"uagb_author_info":{"display_name":"Fabien Marteau","author_link":"http:\/\/www.fabienm.eu\/flf\/author\/admin\/"},"uagb_comment_info":0,"uagb_excerpt":"L&rsquo;annonce a \u00e9t\u00e9 faite mardi 16 octobre par W. Clifford : La version 0.8 de Yosis, un logiciel libre de synth\u00e8se Verilog est sortie. Dans le process de d\u00e9veloppement FPGA\/ASIC la synth\u00e8se est l&rsquo;\u00e9tape de conversion du mod\u00e8le mat\u00e9riel simul\u00e9 en \u00ab\u00a0netlist RTL\u00a0\u00bb d&rsquo;o\u00f9 l&rsquo;on peut d\u00e9river le circuit r\u00e9el. Site officiel de Yosys (77\u2026","_links":{"self":[{"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/posts\/802","targetHints":{"allow":["GET"]}}],"collection":[{"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/comments?post=802"}],"version-history":[{"count":1,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/posts\/802\/revisions"}],"predecessor-version":[{"id":803,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/posts\/802\/revisions\/803"}],"wp:attachment":[{"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/media?parent=802"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/categories?post=802"},{"taxonomy":"post_tag","embeddable":true,"href":"http:\/\/www.fabienm.eu\/flf\/wp-json\/wp\/v2\/tags?post=802"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}